Much of the previous work in multiprocessor systems has addressed the problems of allocating system resources in a general-purpose computing environment. In these systems the computational requirements change as a function of time as various tasks use different resources in a random manner. The present invention involves an application of multiprocessor capabilities to a fundamentally different problem in which the computational load is essentially independent of time. Such applications occur in process control, in simulations of physical systems and where digital computers are embedded in systems. The computations in these applications are repetitive in that a certain number of calculations are required to move the system from one finite state to the next. Computations for one state must be completed before calculations for the next state may begin. This requirement imposes a structure on the computational load because it is known in advance which computational tasks must be completed before the system moves to the next state.
A multiprocessor system architecture is utilized in order to exploit the capabilities offered by parallel processing. A single processor computer system may not complete computations quickly enough to provide real-time responses, especially when a large number of features are included in the system model. Partitioning the program into parallel processible units and using a multiprocessor system is a method of obtaining the required computational speeds. However, once a program has been partitioned, a problem of communication among the processors is introduced, a problem compounded by the highly-coupled structure of many real-time system models. If the multiprocessor system is to be effective, communication of data from one processor to another must be optimized so that needed data can be passed with minimum delay to other processors.
One way to ameliorate the communications problem is to minimize the transmission of control information. This can be accomplished by distributing portions of the control function of the system to individual processors. These operate autonomously from the system control processor. Performance analysis centers around the concept of the speed-up factor, a ratio of the computation time required in a single processor to that in a multiprocessor system.
The architecture selected for the multiprocessor system described herein is unique. All processors are fundamentally identical, although one is given overall system control responsibility by virtue of its priority. Each processor has a dedicated local memory for program and operating system storage. Communications among processors are handled via a shared memory.